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W9725G6KB
For proper operation of adjust mode, WL = RL - 1 = AL + CL - 1 clocks and t DS /t DH should be met as
shown in Figure 7. For input data pattern for adjustment, D T0 - D T3 is a fixed order and is not affected
by burst type (i.e., sequential or interleave).
CLK
CLK
CMD
EMRS
NOP
NOP
NOP
NOP
NOP
NOP
EMRS
NOP
DQS_in
WL
tDS tDH
DQS
WR
DQ_in
DT0
DT1
DT2
DT3
DM
OCD adjust mode
OCD calibration mode exit
Figure 7 – OCD Adjust Mode
8.2.3.3
Drive Mode
Drive mode, both Drive (1) and Drive (0), is used for controllers to measure DDR2 SDRAM Driver
impedance. In this mode, all outputs are driven out t OIT after “enter drive mode” command and all
output drivers are turned-off t OIT after “OCD calibration mode exit” command as shown in Figure 8.
CLK
CLK
CMD
EMRS
NOP
NOP
NOP
NOP
EMRS
NOP
NOP
NOP
t OIT
t OIT
DQS
DQS
DQS high & DQS low for Drive (1), DQS low & DQS high for Drive (0)
DQs high for Drive (1)
HI-Z
DQ
Enter Drive mode
DQs low for Drive (0)
OCD calibration mode exit
Figure 8 – OCD Drive Mode
Publication Release Date: Sep. 03, 2012
- 17 -
Revision A03
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